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Bump to llvm/llvm-project@b959532#18384

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marbre merged 9 commits intomainfrom
integrate/20240827
Aug 29, 2024
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Bump to llvm/llvm-project@b959532#18384
marbre merged 9 commits intomainfrom
integrate/20240827

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@MaheshRavishankar MaheshRavishankar commented Aug 28, 2024 •
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Bump to llvm/llvm-project@b959532
385da9b 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar MaheshRavishankar changed the title Bump to https://github.com/llvm/llvm-project/commit/b9595324846a96dd3… Bump to llvm/llvm-project@b959532 Aug 28, 2024
kuhar
kuhar reviewed Aug 28, 2024
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@MaheshRavishankar MaheshRavishankar force-pushed the integrate/20240827 branch 3 times, most recently from 5de013b to b315686 Compare August 28, 2024 19:50
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ROCm changes LGTM

@MaheshRavishankar
Fix ABI changes.
a47c4f9 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar
Address comments.
6cd22d6 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar
Revert llvm/llvm-project@b6603e1
019b826 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar
Revert iree-org/llvm-project@d7073c5
40242e8 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
This was referenced Aug 29, 2024
Merged
Merged
@MaheshRavishankar
Fix CPU pipeline test.
48b7196 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar
Fix SPIR-V pipeline test.
b346aca 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar
Fix ROCDL pipeline test.
e9fad34 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
@MaheshRavishankar
Revert llvm/llvm-project@1387ba4
f50a008 
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
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MaheshRavishankar commented Aug 29, 2024

The failure with llvm/llvm-project@1387ba4 can be reproed by this test

module {
  func.func @ext_fp8_dispatch() attributes {translation_info = #iree_codegen.translation_info<LLVMGPUVectorize workgroup_size = [128, 1, 1] subgroup_size = 64>} {
    %c128 = arith.constant 128 : index
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan layout(<bindings = [#hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>]>) binding(0) alignment(64) offset(%c0) flags(ReadOnly) : me\mref<4096xf8E4M3FNUZ, #gpu.address_space<global>>
    memref.assume_alignment %0, 64 : memref<4096xf8E4M3FNUZ, #gpu.address_space<global>>
    %1 = hal.interface.binding.subspan layout(<bindings = [#hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>]>) binding(1) alignment(64) offset(%c0) flags(ReadOnly) : me\mref<4096xf8E5M2FNUZ, #gpu.address_space<global>>
    memref.assume_alignment %1, 64 : memref<4096xf8E5M2FNUZ, #gpu.address_space<global>>
    %2 = hal.interface.binding.subspan layout(<bindings = [#hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>]>) binding(2) alignment(64) offset(%c0) : memref<4096xf32, #\gpu.address_space<global>>
    memref.assume_alignment %2, 64 : memref<4096xf32, #gpu.address_space<global>>
    %workgroup_id_x = hal.interface.workgroup.id[0] : index
    %thread_id_x = gpu.thread_id  x
    %3 = arith.muli %workgroup_id_x, %c128 : index
    %4 = arith.addi %thread_id_x, %3 : index
    %5 = memref.load %0[%4] : memref<4096xf8E4M3FNUZ, #gpu.address_space<global>>
    %6 = memref.load %1[%4] : memref<4096xf8E5M2FNUZ, #gpu.address_space<global>>
    %7 = arith.extf %5 : f8E4M3FNUZ to f32
    %8 = arith.extf %6 : f8E5M2FNUZ to f32
    %9 = arith.addf %7, %8 : f32
    memref.store %9, %2[%4] : memref<4096xf32, #gpu.address_space<global>>
    return
  }
}

iree-opt  --iree-gpu-test-target=gfx908 --iree-convert-to-rocdl small_repro.mlir

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krzysz00 commented Aug 29, 2024

@MaheshRavishankar I'd argue that that test should fail on gfx908 - gfx908 doesn't support fp8 types, which means that those extfs shouldn't lower.

I'm confused by why that ever passed and what the generated LLVM IR looked like

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MaheshRavishankar commented Aug 29, 2024

There might be some legalization in LLVM for these types on non-supported hardware. Would be good to check.

@marbre marbre merged commit 0d196cd into main Aug 29, 2024
@marbre marbre deleted the integrate/20240827 branch August 29, 2024 15:04
@nithinsubbiah nithinsubbiah mentioned this pull request Sep 3, 2024
Merged
nithinsubbiah added a commit that referenced this pull request Sep 4, 2024
@nithinsubbiah
[Codegen][ROCM] Update pass signature in ROCDL pipeline (#18426)
d8caa8d 
Recent LLVM integrate (#18384)
carried a couple of reverts owing to various failures. This patch drops
one of the reverts
(iree-org/llvm-project@f6935c7)
fixed by updating the function signature in ROCDL pipeline.

---------

Signed-off-by: nithinsubbiah <nithinsubbiah@gmail.com>
IanWood1 pushed a commit to IanWood1/iree that referenced this pull request Sep 8, 2024
@nithinsubbiah @IanWood1
[Codegen][ROCM] Update pass signature in ROCDL pipeline (iree-org#18426)
179d0ed 
Recent LLVM integrate (iree-org#18384)
carried a couple of reverts owing to various failures. This patch drops
one of the reverts
(iree-org/llvm-project@f6935c7)
fixed by updating the function signature in ROCDL pipeline.

---------

Signed-off-by: nithinsubbiah <nithinsubbiah@gmail.com>
josemonsalve2 pushed a commit to josemonsalve2/iree that referenced this pull request Sep 14, 2024
@MaheshRavishankar @josemonsalve2
Bump to llvm/llvm-project@b959532 (iree-org#18384)
a8a0827 
This PR contains revert of the following commits from upstream 

-
llvm/llvm-project@b6603e1
: Causes build failure in
https://github.com/llvm/torch-mlir/blob/main/lib/Dialect/Torch/Transforms/InlineGlobalSlots.cpp
-
iree-org/llvm-project@d7073c5
: Causes various errors with EmitC and failure in
https://github.com/iree-org/iree/blob/main/compiler/src/iree/compiler/Codegen/Common/TypePropagationPass.cpp
-
llvm/llvm-project@1387ba4
: Causes failure in
https://github.com/iree-org/iree/blob/main/compiler/src/iree/compiler/Codegen/LLVMGPU/test/rocdl_pipeline_test.mlir

---------

Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
josemonsalve2 pushed a commit to josemonsalve2/iree that referenced this pull request Sep 14, 2024
@nithinsubbiah @josemonsalve2
[Codegen][ROCM] Update pass signature in ROCDL pipeline (iree-org#18426)
66ea6fd 
Recent LLVM integrate (iree-org#18384)
carried a couple of reverts owing to various failures. This patch drops
one of the reverts
(iree-org/llvm-project@f6935c7)
fixed by updating the function signature in ROCDL pipeline.

---------

Signed-off-by: nithinsubbiah <nithinsubbiah@gmail.com>
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